The manufacture of semiconductors has attracted a lot of interest of late, especially because the U.S. produces such a small global share of the most advanced chips. Dutch company ASML’s standout results and raised guidance make lithography and its $150 million extreme ultraviolet (EUV) machines the center of attention in this complex manufacturing space. But making semiconductors is about more than how fine a pattern you can “print” with a litho machine. Inside one of these factories, or “fabs” as they are known in industry parlance, there are hundreds of different types of “tools” that are used to create microscopic features using not only silicon, but a wide range of other materials at an atomic level of precision. Beyond just silicon, many of these materials are insulators, some of them are electrical wiring for signals, and many require processes with fundamentally incompatible materials.
I recently had the opportunity to talk to Dr. Richard (Rick) Gottscho, executive vice president and chief technology officer at Lam Research, about engineering at the atomic level. Lam was founded in 1980 as a manufacturer of plasma etching tools for semiconductor manufacturing, and subsequently diversified into a range of other tools for depositing thin films and cleaning semiconductor wafers. It would be very difficult to make chips without tools from Lam. Rick spent 15 years at Bell Labs before joining Lam in 1996 . Edited excerpts follow.
Shih: People are talking about semiconductor manufacturing these days, but it seems there are many advanced chip manufacturing processes that many people simply don’t understand and therefore are really underappreciated. It seems etch is one of those processes?
Gottscho: I often point to a March 1989 article in the New York Times where Andrew Pollack talks about the “Pillar of the chip industry eroding.” He talks about million-dollar pieces of equipment for arcane processes like plasma etching. Now, that word hit me, arcane, and I must confess I needed to look it up lest I confuse it with archaic. It made me feel proud – being one of the few in the “know” – but also a bit frustrated that plasma etch was so under-appreciated and poorly understood. People may be surprised to know that arcane etch is as essential to chip fabrication as lithography. The complexity of the etch process is evident by how challenging it is to model the process and predict results, unlike litho where models can predict performance with high accuracy. In fact, even today most process development for etch is done empirically, iteratively, akin to Edison’s electric light bulb filament explorations. We and others in the industry are working hard to develop models that will increase speed to solution and limit the amount of resources needed to establish a process, but there is a long way to go. Yet, plasma etching has unquestionably enabled the industry to go beyond lithographic limitations that are largely dictated by the wavelength of the light. With etching technology, lines and holes can be shrunk, smoothed, and replicated from an initial lithographically defined template. For more than 20 years, deposition, litho, and etch co-optimization have been an enabler of technology scaling.
Shih: I’ve often marveled at how amazing it is to print microscopic features below what is theoretically possible with whatever wavelength of light comes out of a lithography machine.
Gottscho: That’s because at advanced semiconductor nodes, chip designs continue to push the boundaries of what’s possible, to maximize performance and minimize costs. Today’s designs at the leading edge call for feature sizes well below the limit of even the most advanced lithography machine. To enable these smaller features, you must decompose the dense pattern into less dense patterns, which are then formed using multiple cycles of lithography, deposition and etch.
Self-aligned multiple patterning is used to halve or quarter the as-printed pitches. This approach of using deposition and etch to reduce the final feature size is also more economical than using multiple lithographic exposures. You go to the limits with litho, and then you use etch and “dep” (deposition) to make it even smaller.
Shih: So etch is a really important complement to the lithography process?
Gottscho: Absolutely. Deposition, litho, and etch are interdependent processes tightly linked together. Technology continues to press forward to meet the incredible opportunity of 5G, cloud, and IoT, and these processes enable our customers to go further by reducing feature sizes and improving pattern fidelity to get a better feature. The litho process can produce lines that have some edge roughness, which can have a negative impact on the variability of the devices you make because it affects what are called “critical dimensions,” such as the transistor gate length. We can also take litho printed lines and improve the sidewall smoothness by typically 30% or more.
Another way we extend the roadmap beyond the limits of litho is line trimming. Once a line is printed, you can use etching techniques to narrow that line and create a smaller device. You can also shrink holes using similar approaches.
Shih: Etching has played a key role in areas like memory technology. I remember back in the 1980s I bought an IBM 3380 disk drive, and it had three gigabytes of storage and cost $100,000. Last month I bought a 256 GB flash memory card, and I think I paid $49.
Gottscho: Yes, correct. Etching and deposition are also key enablers for the manufacture of all semiconductor memory devices. It became even more critical as flash (NAND) memory technology shifted from 2D or planar devices to 3D or vertically stacked memory cells. As the NAND device became vertical, etch and deposition played a larger role in performance scaling. For 3D NAND, the litho requirements are relaxed; the key process is a high aspect ratio etch – approximately a 50:1 ratio of height to width. Technically, that’s extremely difficult. The Empire State Building in New York City has an aspect ratio of not quite 3:1. So imagine stacking 17 of those on top of each other, but with completely straight sides. The amazing thing is these days we are trying to make a perfect vertical profile, etching through perhaps 128 layers of alternating silicon nitride and oxide. Getting a smoothly varying profile through alternating materials is non-trivial. Having the profile be perfectly vertical is extremely difficult.
When you can make a structure like that, it defines the electrical characteristics of not just one but a whole column of devices. Of course, each column, or memory hole from an etch perspective, is replicated trillions of times across a single wafer. They all must be the “same” within tight tolerances. I can’t emphasize enough the challenges of innovating and manufacturing at this scale – it’s amazing what the industry has been able to achieve!
Shih: You have talked about “patterning the impossible stack,” creating atomic scale structures on semiconductor chips with all kinds of materials that are hard to work with. Can you say a little more about this?
Gottscho: It excites me to think about the possibilities here. There are so many clever physicists and electrical engineers dreaming up novel devices. More and more they team with materials scientists, introducing new materials with specific electromagnetic functionality that could disrupt the whole industry – disrupt the whole world for the better! For example, there are devices with new materials that promise to reduce power consumption by orders of magnitude. These new materials have significant challenges associated with them. How do we manufacture reliable product in high volume at high yield? These materials are typically sensitive to ambient conditions, e.g., they might oxidize in air and that oxidation can kill the device entirely. They are extremely difficult to etch. Etching is done mostly using “dry” processes, i.e., the products of the etching reaction are volatile and can be pumped away and scrubbed before being exhausted. Some things, like silicon, silicon dioxide, silicon nitride, silicon-germanium, carbon, aluminum, etc., are easily etched using a variety of chemistries. There are other materials, notably refractory metals such as platinum, copper, palladium, silver, and gold, that don’t readily make volatile compounds with any known chemistry within the temperature range safe for the device you are trying to make. We in the trade would say there is no “process window.” Unless, that is, we invent new techniques for etching that allow the use of alternative chemical approaches. Atomic layer etching is one such opportunity. But even without a new technique, I refuse to believe that there isn’t some clever chemist out there who, if properly funded, wouldn’t find a solution to the problem. Today, more and more new materials are being developed by computer simulation. The combination of machine learning technology with efficient quantum mechanical software, allows the exploration of new materials virtually at lower cost and much less time than if we do it a la Edison (by trial and error). I’d love to see this capability extended to the design of new etch and deposition precursors. In my opinion, this would be an area for government investment. Think about the possibility of achieving 100x less power consumption and the benefits that would deliver!
Shih: Talk about where this all leads us.
Gottscho: We need atomic scale precision across all length scales. And you might say that sounds redundant, but we need atomic scale precision all the way across a 300 millimeter diameter wafer. We need it within features that are on the scale of nanometers. And ultimately we need atomically sharp or at least atomically controlled interfaces.
Shih: I have to put those numbers into a tangible example, something that people can appreciate. It is like saying that if the diameter of a 300 millimeter wafer corresponded to the driving distance from New York City to San Francisco, one nanometer precision on that scale would be the equivalent of the width of my thumbnail, about 15 millimeters. And you need to have uniformity across that whole distance. That’s pretty amazing.
Last question. As we know, the U.S. Innovation and Competition Act proposes a lot of investment in semiconductors. What do you think would be a top priority for this country to invest in?
Gottscho: For the U.S. to maintain our strong lead in semiconductor capital equipment, we should invest a lot more in disruptive innovation and research in the coming decade. The entire industry is witnessing a transformation as fabs become larger and more intelligent factories – utilizing the very computer power that the industry enables. Plasma processing, which is the heart of etch, will need to deliver smarter, yield-enabling, productive solutions. History has shown that U.S. federal funding of plasma research and technology can provide significant contributions to our field. A notable example is plasma in atomic layer etching of dielectrics, a discovery that moved into high volume industrial production relatively recently in 2016. It arose from fundamental research that was sponsored by the National Science Foundation and the Department of Energy. Over the years, dozens of academic and governmental researchers have studied the fundamentals of our plasma processes to supply us with generous numbers of students for the workforce and creative solution pathways. Investing in high-risk research at the frontier is how the U.S. can remain at the forefront and train future generations to continue to lead in this critical area.